A board (circuit board) having a plurality of wiring patterns is subjected to insulation inspection for inspecting the quality of a board by determining whether the condition of insulation between each pair of wiring patterns that is sequentially selected from among the plurality of wiring patterns is good or bad.
Specifically, the quality of a board to be inspected is determined based on a resistance value between a pair of wiring patterns. The resistance value is calculated based on a voltage applied between the pair of wiring patters at a predetermined time when the voltage applied to the pair of wiring patterns has stabilized after the start of the voltage application, and a current flowing between the pair of wiring patterns at the predetermined time.
In such insulation inspection, a relatively high voltage is applied between each pair of wiring patterns. Thus, there are cases where sparks occur between a pair of wiring patterns (more specifically, in a portion having an insufficient insulating condition) and defects caused by the sparks also arise.
In view of this, there is a technique for allowing such a board where sparks have occurred to be more reliably distinguished as being defective (see JP 2003-172757A).
The technique disclosed in JP 2003-172757A is for detecting a voltage induced between a pair of wiring patterns by the application of a voltage during a time period from the time when the voltage application to the pair of wiring patterns is started to a predetermined time when the voltage has stabilized. If a voltage drop of the detected voltage is detected during this time period, the board to be inspected is determined to be defective.